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19-2297; Rev 0; 1/02
Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
General Description
The MAX1970/MAX1971/MAX1972 dual-output currentmode PWM buck regulators operate from 2.6V to 5.5V input and deliver a minimum of 750mA on each output. The MAX1970 and MAX1972 operate at a fixed 1.4MHz (MAX1971 operates at 700kHz) to reduce output inductor and capacitor size and cost. Switching the regulators 180 out-of-phase also reduces the input capacitor size and cost. Ceramic capacitors can be used for input and output. The output voltages are programmable from 1.2V to VIN using external feedback resistors, or can be preset to 1.8V or 3.3V for output 1 and 1.5V or 2.5V for output 2. When one output is higher than 1.2V, the second can be configured down to sub-1V levels. Output accuracy is better than 1% over variations in load, line, and temperature. Internal soft-start reduces inrush current during startup. All devices feature power-on reset (POR). The MAX1971 includes a reset input (RSI), which forces POR low for 175ms after RSI goes low. The MAX1970 and MAX1972 include an open-drain power-fail output (PFO) that monitors input voltage and goes high when the input falls below 3.94V. For USB-powered xDSL modems, this output can be used to detect USB power failure. A minimum switching frequency of 1.2MHz ensures operation outside the xDSL band.
Features
o Current-Mode, 1.4MHz Fixed-Frequency PWM Operation o 180 Out-of-Phase Operation Reduces Input Capacitor o 1% Output Accuracy Over Load, Line, and Temperature Ranges o 750mA Guaranteed Output Current o 2.6V to 5.5V Input o Power-On Reset Delay of 16.6ms (MAX1970) or 175ms (MAX1971 and MAX1972) o Power-Fail Output (MAX1970 and MAX1972 Only) o Power-On Reset Input (MAX1971 Only) o Operation Outside xDSL Band o Ultra-Compact Design with Smallest External Components o Outputs Adjustable from 0.8V to VIN or 1.8V/3.3V and 1.5V/2.5V Preset o All-Ceramic Capacitor Application o Soft-Start Reduces Inrush Current
MAX1970/MAX1971/MAX1972
Ordering Information
PART MAX1970EEE MAX1971EEE MAX1972EEE TEMP RANGE -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 16 QSOP 16 QSOP 16 QSOP
Applications
xDSL Modems xDSL Routers Copper Gigabit SFP and GBIC Modules USB-Powered Devices Dual LDO Replacement
Typical Operating Circuit
VIN 2.6V TO 5.5V
Pin Configuration
TOP VIEW
RSI EN
RSI EN
IN
VCC
POR POR LX1 OUT1 1.8V 750mA
LX1 1 VCC 2 COMP1 3 FB1 4
16 PGND 15 LX2 14 IN
MAX1971 COMP1 COMP2 VCC FBSEL1 FB1
LX2 FB2
OUT2 2.5V 750mA
FB2 5 COMP2 6 REF 7
MAX1970 MAX1971 MAX1972
13 FBSEL1 12 FBSEL2 PF0 (MAX1970/MAX1972) 11 RSI (MAX1971) 10 EN 9 POR
FBSEL2 REF PGND
GND 8
QSOP
________________________________________________________________ Maxim Integrated Products
1
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
ABSOLUTE MAXIMUM RATINGS
IN, EN, FBSEL1, FBSEL2, PFO, POR, RSI, VCC to GND ...................................................-0.3V to +6V COMP1, COMP2, FB1, FB2, REF to GND .............................................-0.3V to (VCC + 0.3V) LX1, LX2 to PGND .......................................-0.3V to (VIN + 0.3V) PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70C) 16-pin QSOP (derate 8.3mW/C above +70C)...........667mW Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VCC = VEN = 5V, R POR = 100k to IN, RPFO = 100k to IN, VRSI = 0, CREF = 0.1F, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER IN AND VCC IN Voltage Range IN Supply Current IN Shutdown Current VCC Undervoltage Lockout Threshold REF REF Voltage REF Shutdown Resistance REF Soft-Start Current FB1 AND FB2 FB_ Regulation Voltage OUT_ Voltage Range OUT1 Regulation Voltage OUT2 Regulation Voltage Maximum Output Current FB1 Input Resistance FB2 Input Resistance FB_ Input Bias Current FBSEL_ = unconnected, OUT1 = FB1, OUT2 = FB2, VCOMP_ = 1.20V to 1.80V, VIN = 2.6V to 5.5V FBSEL_ = unconnected VIN = 2.6V to 5.5V VIN = 4.5V to 5.5V VIN = 2.6V to 5.5V VCOMP1 = 1.2V, FBSEL1= GND VCOMP1 = 1.2V, FBSEL1 = VCC VCOMP2 = 1.2V, FBSEL2 = GND VCOMP2 = 1.2V, FBSEL2 = VCC FBSEL1 = GND FBSEL1 = VCC FBSEL2 = GND FBSEL2 = VCC 1.188 1.2 1.782 3.2670 1.485 2.475 750 30 30 22.5 22.5 60 60 45 45 0.01 120 120 90 90 0.1 1.800 3.3 1.5 2.5 1.200 1.212 VIN 1.818 3.330 1.150 2.525 V V V V mA k k A IREF = 0, VIN = 2.6V to 5.5V REF to GND, VEN = 0 VREF = 1V 20 1.188 1.200 10 25 1.212 25 30 V A Switching with no load VIN = 3.3V VIN = 5.5V, VEN = 0 VCC rising VCC falling 2.20 MAX1971 MAX1970/MAX1972 MAX1970/MAX1972 MAX1971 2.6 5 10 1 1 2.40 2.35 5.5 10 20 100 60 2.55 V mA A V CONDITIONS MIN TYP MAX UNITS
Guaranteed by design (Note 1) Measured from FB1 to GND Measured from FB2 to GND
FB1 or FB2, FBSEL_ = unconnected, VFB1 = VFB2 = 1.15V
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = VEN = 5V, R POR = 100k to IN, RPFO = 100k to IN, VRSI = 0, CREF = 0.1F, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER COMP1 AND COMP2 COMP1 Transconductance COMP2 Transconductance LX1 AND LX2 Internal High-Side MOSFET On-Resistance VIN = 5.0V ILX = -180mA VIN = 3.3V VIN =2.6V Internal Low-Side MOSFET On-Resistance LX_ Current-Sense Transresistance LX_ Current-Limit Threshold LX_ Leakage Current LX_ Switching Frequency LX_ Maximum Duty Cycle LX_ Minimum Duty Cycle POR POR Thresholds POR Delay Time (TD) POR Output Current, High POR Output Voltage, Low POR Startup Voltage Percentage of VOUT, VIN = 2.6V to 5.5V MAX1970 MAX1971/MAX1972 V POR = VIN = 5.5V, VFB1 = VFB2 = 1.15V VFB1 = 1.05V or VFB2 = 1.05V or RSI = IN (MAX1971 only), I POR = 1mA FB1 = FB2 = GND, IPOR = 100A, VIN = 1.2V VOUT rising VOUT falling 87 13.3 140 -1 0.01 0.01 92 90 16.6 175 20 210 1 0.05 0.05 94 % ms A V V VIN = 2.6V to 5.5V MAX1970/MAX1972 MAX1971 Duty Cycle = 100%, VIN = 2.6V to 5.5V VIN = 5.5V VIN = 2.6V to 5.5V High side Low side VLX1 = VLX2 = 5.5V VLX1 = VLX2 = 0 MAX1970/MAX1972 MAX1971 -20 1.2 0.60 1.4 0.70 100 15 10 20 15 1.6 0.80 VIN = 5.0V ILX = 180mA VIN = 3.3V VIN = 2.6V 0.4 0.80 -1.6 0.20 0.24 0.28 0.12 0.14 0.16 0.5 1.2 -0.85 0.6 1.60 -0.40 20 V/A A A MHz % % 0.23 0.25 0.32 0.37 FB1 = COMP1, VCOMP1 = 1.2V FB2 = COMP2, VCOMP2 = 1.2V FBSEL1 = unconnected FBSEL2 = unconnected 35 35 55 55 85 85 S S CONDITIONS MIN TYP MAX UNITS
MAX1970/MAX1971/MAX1972
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = VEN = 5V, R POR = 100k to IN, RPFO = 100k to IN, VRSI = 0, CREF = 0.1F, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER PFO (MAX1970 and MAX1972 Only) PFO Trip Threshold PFO Output Current, High PFO Output Voltage, Low EN AND RSI (MAX1971 Only) Logic Input Thresholds RSI Input Resistance EN Logic Input Current IN = 2.6V to 5.5V VIL VIH 5 -1 -1 VIL VIH 0.4 0.95 1.0 10 1.6 20 1 1 V k A IN = VCC PFO = IN IPFO = 1mA, VIN = 4.3V VCC rising VCC falling 3.86 -1 0.01 4.04 3.94 1 0.05 4.12 V A V CONDITIONS MIN TYP MAX UNITS
Internal pullup resistor to IN Logic input at 0 or 5.5V, VIN = 5.5V
ELECTRICAL CHARACTERISTICS
(VIN = VCC = VEN = 5V, VFB1 = VFB2 = 1.15V, R POR = 100k to IN, RPFO = 100k to IN, RSI = 0, CVCC = 0.1F, CREF = 0.1F, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = -40C to +85C.) (Note 2)
PARAMETER IN AND VCC IN Voltage Range IN Supply Current IN Shutdown Current VCC Undervoltage Lockout Threshold REF REF Voltage REF Shutdown Resistance REF Soft-Start Current FB1 AND FB2 FB_ Regulation Voltage OUT_ Voltage Range OUT1 Regulation Voltage OUT2 Regulation Voltage Maximum Output Current FBSEL_ = unconnected, OUT1 = FB1, OUT2 = FB2, VCOMP_ = 1.20V to 1.80V, VIN = 2.6V to 5.5V FBSEL_ = unconnected VIN = 2.6V to 5.5V VIN = 4.5V to 5.5V VIN = 2.6V to 5.5V VCOMP1 = 1.2V, FBSEL1= GND VCOMP1 = 1.2V, FBSEL1 = VCC VCOMP2 = 1.2V, FBSEL2 = GND VCOMP2 = 1.2V, FBSEL2 = VCC 1.185 1.2 1.778 3.259 1.481 2.469 750 1.212 VIN 1.818 3.333 1.515 2.525 V V V V mA IREF = 0, VIN = 2.6V to 5.5V REF to GND, VEN=0 VREF = 1V 20 1.185 1.212 25 30 V A Switching with no load VIN = 3.3V VIN = 5.5V, VEN = 0 VCC rising VCC falling 2.20 MAX1971 MAX1970/MAX1972 MAX1970/MAX1972 MAX1971 2.6 5.5 10 20 20 100 2.55 V mA A V CONDITIONS MIN TYP MAX UNITS
Guaranteed by design (Note 1)
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = VEN = 5V, VFB1 = VFB2 = 1.15V, R POR = 100k to IN, RPFO = 100k to IN, RSI = 0, CVCC = 0.1F, CREF = 0.1F, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = -40C to +85C.) (Note 2)
PARAMETER FB1 Input Resistance FB2 Input Resistance FB_ Input Bias Current COMP1 AND COMP2 COMP1 Transconductance COMP2 Transconductance LX1 AND LX2 Internal High-Side MOSFET On-Resistance Internal Low-Side MOSFET On-Resistance LX_ Current-Sense Transresistance LX_ Current-Limit Threshold LX_ Leakage Current LX_ Switching Frequency LX_ Minimum Duty Cycle POR POR Thresholds POR Delay Time (TD) POR Output Current, High POR Output Voltage, Low POR Start-Up Voltage Percentage of VOUT, VIN = 2.6V to 5.5V MAX1970 MAX1971/MAX1972 V POR = VIN = 5.5V, VFB1 = VFB2 = 1.15V VFB1 = 1.05V or VFB2 = 1.05V or RSI = IN (MAX1971 only), I POR = 1mA FB1 = FB2 = GND, I POR = 100A, VIN = 1.2V VOUT rising VOUT falling 87 13.3 140 -1 20 210 1 0.05 0.05 94 % ms A V V Duty cycle = 100%, VIN = 2.6V to 5.5V VIN = 5.5V VIN = 2.6V to 5.5V VIN = 2.6V to 5.5V High side Low side VLX1 = VLX2 = 5.5V VLX1 = VLX2 = 0 MAX1970/MAX1972 MAX1971 MAX1970/MAX1972 MAX1971 -20 1.2 0.60 1.6 0.80 20 15 ILX = -180mA ILX = 180mA VIN = 5.0V VIN = 3.3V VIN = 5.0V VIN = 3.3V 0.4 0.76 -1.6 0.32 0.37 0.23 0.25 0.6 1.60 -0.40 20 V/A A A MHz % FB1 = COMP1, VCOMP1 = 1.2V FB2 = COMP2, VCOMP2 = 1.2V FBSEL1 = unconnected FBSEL2 = unconnected 35 35 85 85 S S Measured from FB1 to GND Measured from FB2 to GND CONDITIONS FBSEL1 = GND FBSEL1 = VCC FBSEL2 = GND FBSEL2 = VCC MIN 30 30 22.5 22.5 TYP MAX 120 120 90 90 0.1 UNITS k k A
MAX1970/MAX1971/MAX1972
FB1 or FB2, FBSEL_ = unconnected, VFB1 = VFB2 = 1.15V
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = VEN = 5V, VFB1 = VFB2 = 1.15V, R POR = 100k to IN, RPFO = 100k to IN, RSI = 0, CVCC = 0.1F, CREF = 0.1F, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = -40C to +85C.) (Note 2)
PARAMETER PFO (MAX1970 and MAX1972 Only) PFO Trip Threshold PFO Output Current, High PFO Output Voltage, Low EN AND RSI (MAX1971 Only) Logic Input Thresholds RSI Input Resistance EN Logic Input Current IN = 2.6V to 5.5V VIL VIH 5 -1 -1 VIL VIH 0.4 1.6 20 1 1 V k A IN = VCC PFO = IN IPFO = 1mA, VIN = 4.3V VCC rising VCC falling 3.86 -1 1 0.05 4.12 V A V CONDITIONS MIN TYP MAX UNITS
Internal pullup resistor to IN Logic Input at 0 or 5.5V, VIN = 5.5V
Note 1: Refer to the Output Voltage Selection section. Note 2: Specifications to -40C are guaranteed by design and not production tested.
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
MAX1970TOC01
MAX1970/MAX1971/MAX1972
EFFICIENCY vs. LOAD CURRENT
MAX1970TOC02
EFFICIENCY vs. LOAD CURRENT
90 80 EFFICIENCY (%) 70 60 50 40 30 MAX1970/ MAX1972 VIN = 3.3V 0.01 0.1 LOAD CURRENT (A) 1 VOUT1 = 1.8V VOUT2 = 1.5V VOUT2 = 2.5V
MAX1970TOC03
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 0.1 LOAD CURRENT (A) 1 VOUT2 = 1.5V MAX1970/ MAX1972 VIN = 5.0V VOUT1 = 1.8V VOUT1 = 3.3V VOUT2 = 2.5V
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 0.1 LOAD CURRENT (A) 1 MAX1971 VIN = 5.0V VOUT1 = 1.8V VOUT2 = 1.5V VOUT2 = 2.5V VOUT1 = 3.3V
100
20 10 0
EFFICIENCY vs. LOAD CURRENT
MAX1970TOC04
INPUT CURRENT vs. OUTPUT CURRENT
450 400 INPUT CURRENT (mA) 350 300 250 200 150 100 50 0 1 0 100 200 VOUT1 = 1.8V VOUT2 = 1.5V MAX1970/MAX1972 1.17 300 400 500 600 700 800 0 VIN = 5.0V VOUT1 = 3.3V VOUT2 = 2.5V
MAX1970TOC05
REFERENCE VOLTAGE vs. REFERENCE LOAD CURRENT
MAX1970TOC06
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 0.1 LOAD CURRENT (A) MAX1971 VIN = 3.3V VOUT1 = 1.8V VOUT2 = 1.5V VOUT2 = 2.5V
500
1.22
REFERENCE VOLTAGE (V)
1.21
1.20
1.19
1.18
5
10
15
20
OUTPUT CURRENT (mA)
REFERENCE LOAD CURRENT (A)
OSCILLATOR FREQUENCY vs. INPUT VOLTAGE
MAX1970TOC07
CHANGE IN OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1970TOC08
1.60 MAX1970/MAX1972 OSCILLATOR FREQUENCY (MHz) 1.40 1.20 1.00 MAX1971 0.80 0.60 TA = +25C 0.40 2.5 3.0 3.5 4.0 4.5 5.0 TA = +85C TA = -40C TA = +25C TA = -40C TA = +85C
3 CHANGE IN OUTPUT VOLTAGE (mV) 2 1 VOUT1 = 1.8V VOUT1 = 3.3V 0 -1 -2 -3 VOUT2 = 2.5V VOUT2 = 1.5V
VIN = 5.0V MAX1970/MAX1972 0 200
5.5
400
600
800
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
LOAD TRANSIENT RESPONSE
MAX1970TOC09
LOAD TRANSIENT RESPONSE
MAX1970TOC10
VOUT1
VOUT2
IOUT1 MAX1970/MAX1972 40s/div VIN = 5V VOUT1 = 3.3V, 100mV/div IOUT1 = 300mA TO 600mA RC1 = 82k, CC1 = 680pF
IOUT2 MAX1970/MAX1972 40s/div VIN = 5V VOUT2 = 1.5V, 100mV/div IOUT2 = 300mA TO 600mA RC2 = 39k, CC2 = 680pF
SWITCHING WAVEFORMS
MAX1970TOC11
MAXIMUM OUTPUT TRANSIENT DURATION vs. POR COMPARATOR OVERDRIVE
MAX1970TOC12
14 POR COMPARATOR OVERDRIVE (%) 200mA/div 12 10 8 6 4 2 0 0.01 0.1 1
IL1
5V/div VLX1 IL2 VLX2 MAX1970/MAX1972 200ns/div VIN = 5V VOUT1 = 1.8V, VOUT2 = 2.5V IOUT1 = 500mA, IOUT2 = 500mA 200mA/div 5V/div
10
MAXIMUM OUTPUT TRANSIENT DURATION (s)
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
RSI AND POR TIMING
MAX1970TOC13
PFO AND RISING INPUT VOLTAGE
MAX1970TOC14
VIN VRSI 2V/div VPOR PF0
4V
0 2V/div 4V
0 4ms/div VOUT1 = 1.8V, VOUT2 = 2.5V
40ms/div VIN = 5V VOUT1 = 1.8V, VOUT2 = 2.5V IOUT1 = 500mA, IOUT2 = 500mA
PFO AND FALLING INPUT VOLTAGE
MAX1970TOC15
ENABLE RESPONSE
MAX1970TOC16
POR
VIN
4V 0 2V/div 4V EN 5V/div VOUT1
PF0 VOUT2 0
4ms/div VOUT1 = 1.8V, VOUT2 = 2.5V
5ms/div MAX1970 VIN = 5V VOUT1 = 3.3V, VOUT2 = 2.5V IOUT1 = 375mA, IOUT2 = 375mA
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
SHUTDOWN RESPONSE
POR
MAX1970TOC17
EN 5V/div VOUT1
VOUT2
5ms/div MAX1970 VIN = 5V VOUT1 = 3.3V, VOUT2 = 2.5V IOUT1 = 375mA, IOUT2 = 375mA
Pin Description
PIN 1 2 3 NAME MAX1970/MAX1972 LX1 VCC COMP1 MAX1971 LX1 VCC COMP1 FUNCTION Inductor Connection 1. Connect an inductor between LX1 and OUT1. Analog Supply Voltage. Bypass with 0.1F to ground. OUT1 Regulator Compensation. Connect series RC network from COMP1 to GND. COMP1 is pulled to GND when the outputs are shut down. See the Compensation Design section for component values. OUT1 Feedback. Connected to OUT1 for internal mode (FBSEL1 = GND or VCC). Use an external resistor-divider from OUT1 to GND to set the output voltage from 1.2V to VIN for external mode (FBSEL1 = unconnected). See the Output Voltage Selection section for <1.2V output. OUT2 Feedback. Connected to OUT2 for internal mode (FBSEL2 = GND or VCC). Use an external resistor-divider from OUT2 to GND to set the output voltage from 1.2V to VIN for external mode (FBSEL2 = unconnected). See the Output Voltage Selection section for <1.2V output. OUT2 Regulator Compensation. Connect series RC network from COMP2 to GND. COMP2 is pulled to GND when the outputs are shut down. See the Compensation Design section for component values. Reference. Bypass with 0.01F to 1.0F capacitor. REF controls the soft-start ramp and is pulled to GND when the outputs are shut down. Ground
4
FB1
FB1
5
FB2
FB2
6
COMP2
COMP2
7 8
REF GND
REF GND
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
Pin Description (continued)
PIN NAME MAX1970/MAX1972 POR MAX1971 POR FUNCTION Active-Low Power-On Reset Output. Open-drain output goes high 16.6ms (MAX1970) or 175ms (MAX1971 or MAX1972) after both outputs reach 92% of nominal value, and RSI (MAX1971 only) is low. Enable Input. Drive high to turn on both OUT1 and OUT2. Drive low to place the device in shutdown. Power-Fail Output. Open-drain output goes high when VCC drops below 3.94V. Useful for detecting a valid USB input voltage. Noninverting Reset Input. Causes POR to go low when RSI is high. Allows POR to go high 175ms after RSI falls, if outputs are in regulation. Regulator 2 Feedback Select. Connect to VCC to set VOUT2 to 2.5V. Connect to GND to set VOUT2 to 1.5V. Leave unconnected to use external feedback resistors. Regulator 1 Feedback Select. Connect to VCC to set VOUT1 to 3.3V. Connect to GND to set VOUT1 to 1.8V. Leave unconnected to use external feedback resistors. Power-Supply Voltage. Input range from 2.6V to 5.5V. Bypass with 10F capacitor to PGND. Inductor Connection 2. Connect an inductor between LX2 and OUT2. Power Ground
MAX1970/MAX1971/MAX1972
9
10
EN PFO
EN -- RSI FBSEL2 FBSEL1 IN LX2 PGND
11 -- 12 13 14 15 16 FBSEL2 FBSEL1 IN LX2 PGND
Detailed Description
The MAX1970/MAX1971/MAX1972 are dual-output, fixed-frequency, current-mode, PWM, step-down DC/DC converters. The MAX1970 and MAX1972 switch at 1.4 MHz while the MAX1971 switches at 700kHz. The two converters on each IC switch 180 out of phase with each other to reduce input ripple current. The high-switching frequency allows use of smaller capacitors for filtering and decoupling. Internal synchronous rectifiers improve efficiency and eliminate the typical Schottky freewheeling diode. The on-resistances of the internal MOSFETs are used to sense the switch currents for controlling and protecting the MOSFETs, eliminating current-sensing resistors to further improve efficiency and cost. The input voltage range is 2.6V to 5.5V. Each converter has a three-mode feedback input. Internally, OUT1 is set to either 3.3V or 1.8V, and OUT2 to 2.5V or 1.5V by connecting FBSEL1 and FBSEL2 to V CC or GND, respectively. When FBSEL1 or FBSEL2 are floating, each output can be set to any voltage between 1.2V and VIN through an external resistive divider. Having an output below 1.2V is also possible (see the Output Voltage Selection section).
DC-DC Controller
The MAX1970/MAX1971/MAX1972 family of step-down converters uses a pulse-width-modulating (PWM) currentmode control scheme. The heart of the current-mode PWM controller is an open-loop comparator that compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope compensation ramp. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator trips. During this on time, current ramps up through the inductor, sourcing current to the output and storing energy in a magnetic field. The current-mode feedback system regulates the peak inductor current as a function of the output voltage error signal. Since the average inductor current is nearly the same as the peak inductor current (assuming that the inductor value is relatively high to minimize ripple current), the circuit acts as a switch-mode transconductance amplifier. It pushes the output LC filter pole, normally found in a voltage-mode PWM, to a higher frequency. To preserve inner loop stability and eliminate inductor stair casing, a slope-compensation ramp is summed into the main PWM comparator. During the second half of the cycle, the internal high-side MOSFET
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
VCC
IN FB1 FBSEL1 FB SELECT
REGULATOR 1
ERROR SIGNAL SLOPE COMP PWM CONTROL CURRENT SENSE LX1
COMP1
CLAMP PGND
REF
SOFT-START
REFERENCE VOLTAGE 1.2V
/2(MAX1970/ MAX1972)/ /4(MAX1971)
2.8MHz OSCILLATOR MAX1971 ONLY RSI POR
THERMAL SHUTDOWN EN VOK PFO MAX1970/MAX1972 ONLY
POR
PFO
COMP2 FB2 FBSEL2 REGULATOR 2
MAX1970 MAX1971 MAX1972
GND
Figure 1. Functional Diagram
turns off and the internal low-side N-channel MOSFET turns on. Now the inductor releases the stored energy as its current ramps down while still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load current and discharges when the inductor current is lower, smoothing the voltage across the load. Under overload conditions, when the inductor current exceeds the current limit (see the Current Limit section), the high-side MOSFET is not
12
turned on at the rising edge of the clock and the lowside MOSFET remains on to let the inductor current ramp down.
Current Sense
The current-sense circuit amplifies the current-sense voltage generated by the high-side MOSFET's on-resistance and the inductor current (RDS(ON) IINDUCTOR). This amplified current-sense signal and the internal slope compensation signal are summed together into
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
the PWM comparator's inverting input. The PWM comparator turns off the internal high-side MOSFET when this sum exceeds the integrated feedback voltage.
Power-Fail Output
The input voltage is sensed for 5V (typical USB applications), and if VCC drops below 3.94V, the power-fail output (PFO) goes high. The time from PFO going high to the outputs going out of regulation depends on the operating output voltage and currents, and the upstream 5V bus storage capacitor value, which is 120F minimum (per USB specification, version 2.0). The lower the operating voltages and currents, and the higher the storage capacitor, the longer the elapsed time. PFO is an opendrain output, and a 10k to 100k pullup resistor to VCC, or either output, is recommended.
MAX1970/MAX1971/MAX1972
Current Limit
The internal MOSFET has a current limit of 1.2A (typ). If the current flowing out of LX_ exceeds this maximum, the high-side MOSFET turns off and the synchronous rectifier MOSFET turns on. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. There is also a synchronous rectifier current limit of -0.85A. This is to protect the device from current flowing into LX_. If the negative current limit is exceeded, the synchronous rectifier is turned off, and the inductor current continues to flow through the high-side MOSFET body diode back to the input until the beginning of the next cycle or until the inductor current drops to zero.
Power-On Reset
Power-on reset (POR) provides a system reset signal. During power-up, POR is held low until both outputs reach 92% of their regulated voltages, POR continues to be held low for a delayed period, and then goes high. This delay time (TD) for MAX1970 is 16.6ms. The MAX1971 and MAX1972 have a delay of 175ms. Figure 2 is an example of a timing diagram. The POR comparator is designed to be relatively immune to short-duration negative-going output glitches.The Typical Operating Characteristics gives a plot of maximum transient duration vs. POR comparator overdrive. The graph was generated using a negative-going pulse applied to an output, starting at 100mV above the actual POR threshold, dropping below the POR threshold by the percentage indicated as comparator overdrive, and then returning to 100mV above the threshold. The graph indicates the maximum pulse width the output transient can have without causing POR to trip low.
VCC Decoupling
Due to the high-switching frequency and tight output tolerance (1%), decoupling between IN and VCC is recommended. Connect a 10 resistor between IN and VCC and a 0.1F ceramic capacitor from VCC to GND. Place the resistor and capacitor as close to VCC as possible.
Startup
To reduce the supply inrush current, soft-start circuitry ramps up the output voltage during startup. This is done by charging the REF capacitor with a current source of 25A. Once REF reaches 1.2V, the output is in full regulation. The soft-start time is determined from: V t SS = REF CREF = 4.8 x 104 x CREF IREF Soft-start occurs when power is first applied, and when EN is pulled high with power already present. The part also goes through soft-start when coming out of undervoltage lockout (UVLO) or thermal shutdown. The range of capacitor values for CREF is from 0.01F to 1.0F.
Reset Input
Reset input (RSI) is an input on the MAX1971 that, when driven high, forces the POR to go low. When RSI goes low, POR goes through a delay time identical to a power-up event. See Figure 2 for timing diagram. RSI allows software to command a system reset. RSI must be high for a minimum period of 1s in order to initiate the POR.
Undervoltage Lockout
If V CC drops below 2.35V, the MAX1970/MAX1971/ MAX1972 assume that the supply voltage is too low to provide a valid output voltage, and the UVLO circuit inhibits switching. Once V CC rises above 2.4V, the UVLO is disabled and the soft-start sequence initiates.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation. When the IC's junction temperature exceeds TJ = +170C, a thermal sensor shuts down the device, allowing the IC to cool. The thermal sensor turns the part on again after the junction temperature cools by 20C. This results in a pulsed output during continuous overload conditions. During a thermal event, POR goes low, PFO goes high, and soft-start is reset.
13
Enable
A logic-enable input (EN) is provided. For normal operation, drive EN logic high. Driving EN low turns off both outputs, and reduces the input supply current to approximately 1A.
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
VOUT TD
POR
~1V PKMAX TD TRESET = 1s MIN
RSI
4.04V VIN
3.94V
PFO
Figure 2. Timing Diagram
Design Procedure
Output Voltage Selection
Both output voltages can be selected in three different ways as indicated by Table 1. Each output has two preset voltages that can be set using FBSEL_ and it can also be set to any voltage from 0.8V to VIN by using an external resistor voltage-divider. To use a resistor-divider to set the output voltage to 1.2V or higher (Figure 5), connect a resistor from FB_ to OUT_ (R_a), and connect a resistor from FB_ to GND (R_ b ). Select the value of R_ b , between 10k and 30k. Then R_a is calculated by: V R _ a = R _ b x OUT - 1 1.2 A resistor-divider can also be used to set the voltage of one output from 0.8V to 1.2V. To do this, the other output must be above 1.2V. Figure 6 shows an example of this where OUT1 is set to 1V. To set the output voltage to less than 1.2V, connect a resistor from FB1 to OUT1 (R1), and from FB1 to OUT2 (R2). Select values of R1 and R2 such that current flowing through R1 and R2 is about 100A and following equation is satisfied: R1 = R2 1.2 - VOUT2 VOUT1 - 1.2
Each output is capable of continuously sourcing up to 750mA of current as long as the following condition is met: VOUT1 x IOUT1 + VOUT2 x IOUT2 1.05A VIN
Inductor Value
A 3.3H to 6.8H inductor with a saturation current of 800mA (min) is recommended for most applications. For best efficiency, the inductor's DC resistance should be less than 100m, and saturation current should be greater than 1A. See Table 2 for recommended inductors and manufacturers.
14
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
VIN 3.3V TO 5.5V VCC 100k 14 PFO EN 680pF 82k 11 10 3 PFO EN IN 2 VCC POR LX1 FB1 9 1 4 10F VOUT2 1.5V 4.7H POR VOUT1 3.3V 10F 10 0.1F 100k
MAX1972
COMP1
680pF
39k
6 12
COMP2 FBSEL2 LX2 FB2 15 5 4.7H
VCC 13 FBSEL1 7 REF GND 8
10F PGND 16
0.1F
Figure 3. Typical Application Circuit 1
VIN 3.3V TO 5.5V VCC 100k 14 PFO EN 680pF 82k 11 10 3 PFO EN COMP1 IN 10F
10 0.1F 100k 2 VCC POR LX1 FB1 9 1 4 10F VOUT2 2.5V 4.7H POR VOUT1 3.3V
MAX1970 MAX1972
680pF
62k
6 13
COMP2 FBSEL1 LX2 FB2 15 5 4.7H
VCC 12 FBSEL2 7 REF GND 8
10F PGND 16
0.1F
Figure 4. Typical Application Circuit 2
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15
Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
VIN 2.6V TO 5.5V 10F 10
0.1F 100k 14 IN 11 RSI 10 EN 2 VCC 9 1 4.7H R1a FB1 6 13 COMP2 FBSEL1 LX2 12 7 FBSEL2 REF GND 8 FB2 PGND 16 R2b 15 5 4 R1b 4.7H R2a VOUT2 10F POR VOUT1 10F
RSI EN 680pF RC1
POR LX1
3
MAX1971
COMP1
680pF
RC2
0.1F
Figure 5. Setting the Output Voltage with External Resistors
VIN 3V TO 3.6V VCC
10
0.1F 100k
100k RSI EN 680pF 27k
14 11 IN PFO 10 3 EN
2 VCC
POR LX1
9 1 4.7H R1 2k
POR VOUT1 1.0V 10F
MAX1970
COMP1 FB1 COMP2 FBSEL1 LX2 4
680pF
68k
6 13
VCC 12 7 0.1F FBSEL2 REF GND 8
15 5
R2 13k 4.7H
VOUT2 2.5V 10F
FB2 PGND 16
Figure 6. Setting an Output Below 1.2V
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
Table 1. Output Voltage Settings
FBSEL1 VCC GND Open OUTPUT 1 3.3V 1.8V Ext Divider FBSEL2 VCC GND Open OUTPUT 2 2.5V 1.5V Ext Divider
Output Capacitor
The key selection parameters for the output capacitor are its capacitance, ESR, ESL, and the voltage rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-DC converter. The output ripple is due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor's ESR, and the voltage drop due to the capacitor's ESL. VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) The output voltage ripple due to the output capacitance, ESR, and ESL is: VRIPPLE(C) = IP-P 8 x COUT x fSW
MAX1970/MAX1971/MAX1972
For most designs, a reasonable inductor value (LINIT) is derived from the following equation: LINIT = VOUT (VIN - VOUT )
VIN x LIR x IOUT(MAX ) x fOSC
Keep the inductor current ripple percentage LIR between 20% and 40% of the maximum load current for best compromise of cost, size, and performance. The maximum inductor current is: LIR IL(MAX ) = 1+ IOUT(MAX ) 2
VRIPPLE(ESR) = IP-P x ESR VRIPPLE (ESL) = (IP-P / TON) ESL or (IP-P / TOFF) ESL, whichever is greater. IP-P is the peak-to-peak inductor current: V -V V IP-P = IN OUT x OUT fSW x L VIN These equations are suitable for initial capacitor selection, but final values should be set by testing a prototype or evaluation circuit. As a rule, a smaller ripple current results in less output voltage ripple. Since the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with larger inductance. Ceramic capacitors are recommended due to their low ESR and ESL at the switching frequency of the converter. For ceramic capacitors, the ripple voltage due to ESL is negligible. Load transient response depends on the selected output capacitor. During a load transient, the output instantly changes by ESR ILOAD. Before the con
Input Capacitor
The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit's switching. The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents defined by the following equation: 1 IOUT12 x VOUT1(VIN - VOUT1) + VIN IOUT22 x VOUT2 (VIN - VOUT2 )
IRMS =
A ceramic capacitor is recommended due to its low equivalent series resistance (ESR), equivalent series inductance (ESL), and lower cost. Choose a capacitor that exhibits less than a 10C temperature rise at the maximum operating RMS current for optimum long-term reliability.
Table 2. Suggested Inductors
MANUFACTURER Coilcraft Sumida Sumida PART DO1606 CR43-4R7 CDRH3D16-4R7 INDUCTANCE (H) 4.7 4.7 4.7 ESR (m) 120 108.7 80 SATURATION CURRENT (A) 1.2 1.15 0.9 DIMENSIONS (mm) 5.3 5.3 2 4.5 4 3.5 3.8 3.8 0.8
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17
Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
troller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time (see the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its nominal state. The controller response time depends on the closed-loop bandwidth. With a higher bandwidth, the response time is faster, thus preventing the output from deviating further from its regulating value. The zero frequency for the output capacitor ESR is: fzESR = 1 2 x COUT x ESR
Compensation Design
An internal transconductance error amplifier is used to compensate the control loop. Connect a series resistor and capacitor between COMP and GND to form a polezero pair. The external inductor, internal high-side MOSFET, output capacitor, compensation resistor, and compensation capacitor determine the loop stability. The inductor and output capacitor are chosen based on performance, size, and cost. Additionally, the compensation resistor and capacitor are selected to optimize control-loop stability. The component values shown in the typical application circuits (Figures 3, 4, and 5) yield stable operation over a broad range of input-to-output voltages. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. The voltage across the internal high-side MOSFET's on-resistance (RDS(ON)) is used to sense the inductor current. Current mode control eliminates the double pole caused by the inductor and output capacitor, which has large phase shift that requires more elaborate error-amplifier compensation. A simple Type 1 compensation with single compensation resistor (RC) and compensation capacitor (CC) is all that is needed to have a stable and highbandwidth loop. The basic regulator loop consists of a power modulator, an output feedback divider, and an error amplifier. The power modulator has DC gain set by gmc x RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. Below are equations that define the power modulator: GMOD = gmc x RLOAD The pole frequency for the modulator is: 1 fpMOD = 2 x COUT x (RLOAD + ESR)
where, RLOAD = VOUT/IOUT(MAX), and GMC = 2S. The feedback divider has a gain of GFB = VFB/VOUT, where VFB is equal to 1.2V. The transconductance error amplifier has a DC gain, GEA(DC), of 60dB. A dominant pole is set by the compensation capacitor, CC, the output resistance of the error amplifier (ROEA), 20M, and the compensation resistor, RC. A zero is set by RC and CC. The pole frequency set by the transconductance amplifier output resistance, and compensation resistor and capacitor is: fpEA = 1 2 x CC x ROEA
The zero frequency set by the compensation capacitor and resistor is: fzEA = 1 2 x CC x RC
For best stability and response performance, the closed-loop unity-gain frequency must be much higher than the modulator pole frequency. In addition, the closed-loop unity-gain frequency should be approximately 50kHz. The loop gain equation at unity gain frequency then is: V GEA(fc) x GMOD(fc) x FB = 1 VO Where GEA(fc) = gmEA RC, and GMOD(fc) = gmc RLOAD fpMOD/fc, where gmEA = 50S, RC can be calculated as: RC = VO gmEA x VFB x GMOD(fc)
The error-amplifier compensation zero formed by RC and CC is set at the modulator pole frequency at maximum load. CC is calculated as follows: CC = VOUT x COUT RC x IOUT(MAX )
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Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO
As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly, and the closed-loop unity-gain frequency remains the same. Below is a numerical example to calculate RC and CC values of the typical application circuit of Figure 4, where: VOUT = 2.5V IOUT(MAX) = 0.6A COUT = 10F RESR = 0.010 gmEA = 50S gmC = 2S fSWITCH = 1.4 MHz RLOAD = VOUT / IOUT(MAX) = 2.5V / 0.6 A = 4.167 fpMOD = 1 / [2 COUT (RLOAD + RESR)] = 1 / [2 10 10-6 (4.167 + 0.01)] = 3.80 kHz. fzESR = 1 / [2 COUT RESR] = 1 / [2 10 10-6 0.01] = 1.59 MHz. Pick a closed-loop unity-gain frequency (fc) of 50kHz. The power modulator gain at fc is: GMOD(fc) = gmc RLOAD fpMOD / fc = 2 4.167 3.80k / 50k = 0.635 then: RC = VO / (gmEA VFB GMOD(fc)) = 2.5 / (50 10-6 1.2 0.635) 62k CC = VOUT ( COUT / RC ) IOUT(MAX) = 2.5 4.7 -6 10 / 62k 0.6 680pF
Applications Information
PC Board Layout
Careful PC board layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout: 1) Place decoupling capacitors as close to IC pins as possible. Keep power ground plane (connected to PGND) and signal ground plane (connected to GND) separate. Connect the two ground planes together with a single connection from PGND to GND. 2) Input and output capacitors are connected to the power ground plane; all other capacitors are connected to signal ground plane. 3) Keep the high-current paths as short and wide as possible. 4) If possible, connect IN, LX1, LX2, and PGND separately to a large land area to help cool the IC to further improve efficiency and long-term reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close to the IC as possible. 6) Route high-speed switching nodes away from sensitive analog areas (FB1, FB2, COMP1, COMP2).
MAX1970/MAX1971/MAX1972
Chip Information
TRANSISTOR COUNT: 5428 PROCESS: BiCMOS
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19
Dual, 180 Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO MAX1970/MAX1971/MAX1972
Package Information
QSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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